
Abhijit Rameshwar Asati
Publon Profile:
https://publons.com/researcher/3172505/abhijit-asati/
https://www.webofscience.com/wos/author/record/1880709
(Web of Science Researcher ID: AAC-3674-2019 )
Semantic Scholar Profile:
(1) https://www.semanticscholar.org/author/Abhijit-R.-Asati/2209810
(2) https://www.semanticscholar.org/author/Abhijit-Rameshwar-Asati/48883907
Research Gate:
https://www.researchgate.net/profile/Abhijit_Asati
Scopus Author ID: 26435667800
https://www.scopus.com/authid/detail.uri?authorId=26435667800
Vidvan ID:228428
https://vidwan.inflibnet.ac.in/prohttps://vidwan.inflibnet.ac.in/profile/228428file/228428
ORCID ID:
https://orcid.org/0000-0002-4914-5951
Professional Experience:
1 March 2023 Professor BITS, Pilani-333031
1 July 2018 to 29 February 2023 Associate Professor BITS, Pilani-333031
May 2010 to June 2018 Assistant Professor BITS, Pilani-333031
2001 to April 2010 Lecturer BITS, Pilani-333031
1999 to 2000 System Engineer Systems India Nagpur
1997 to 1999 Lecturer VNIT, Nagpur-440011
1996 to 1997 Trainee KTPS, Koradi
Technical Experience:
[1] VLSI design tools: Tanner/Cadence Tools (Spice, Layout editor, Schematic editor, Virtuoso), Design languages (Verilog, VHDL, Modelsim), HDL Synthesis tools (RTL Compiler, SOC encounter) FPGA (Vivado, hdlcoder), Verification languages (HDL, System Verilog) etc.
[2] Worked on project “Design of Application Specific Processor for text to speech-conversion
for Indian Languages” at Central Electronics Engineering Research Institute, Pilani.
Industry Immersion Program:
[1] May to July 2014 at "Cypress Semiconductor Limited, Bangalore".
Following online modules offered by cypress university were also completed by me as a part of program: (as indicated in the transcript)
C125: Constraint Verification and Analysis using Constraint Verifier
C116: Verification Management System Training
Introduction to IT Training (presentation)
C102: Power Aware LEC (exam)
A22: Physical Verification Online Training (exam) A
A22: Physical Verification Online Training (presentation2)
A22: Physical Verification Online Training (presentation3)
A22: Physical Verification Online Training (presentation1)
A13 Layout Parasitic Extraction (exam)
University Immersion Program:
[1] May 2017- July 2017:
Got a offer letter from university of Virginia, Charlottesvillie, to join as 'Visiting Assistant Professor' in the Department of Electrical and Computer Engineering, but could not join due to USA visa issues.
[2] 'Visiting Assistant Professor' University of Virginia, Charlottesvillie, Department of Electrical and Computer Engineering, May 2018 - July 2018
PS-1 Course Instructor:
PS-1 instructor for 10 time (Check in the Institutional Contribution & Industry Engagement link)
(For more details refer to OTHER link)
Participated in conducting BITSAT Examination:
Performed BITSAT duty 3 times (Check in the Institutional Contribution & Industry Engagement link)
(For more details refer to OTHER link)